Browsing by Type "proceedings-article"
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PublicationA review on harmonic mitigation method for non-linear load in electrical power system( 2021)
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PublicationA review on harmonic mitigation method for non-linear load in electrical power system( 2021)
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PublicationAn Analysis of Interpolation Implementation for LNS Addition and Subtraction Function in Positive RegionInterpolation is among of the most popular approach used in approximating the values in logarithmic number system (LNS) arithmetic design. This method that often combines with lookup tables (LUTs) manages to produce efficient LNS design in area, latency and accuracy. Current research proves that the combination of interpolators with co-transformation in LNS subtraction had shown extreme improvements in terms of speed and area, which is comparable to floating point (FLP) performance. Taking the advantage, this research had been conducted to analyze the implementation of these three interpolators, which are Taylor, Lagrange and modified Lagrange, in a 32-bit environment of the LNS addition and subtraction procedures with the first-order co-transformation in positive region. The designs were analyzed in two categories, which are the accuracy towards FLP and the total memory consumption. The best interpolator was selected based on the most optimum area consumption design with manageable accuracy in FLP limit. The outcome of this analysis could benefit further improvements in LNS design.
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PublicationArithmetic addition and subtraction function of logarithmic number system in positive region: An investigationLogarithmic number system or LNS has become an optimal choice in digital image processing instead of floating point (FP) system based on latest researches in LNS. Digital image processing which deals with a lot of complex operations such as multiplication and division, makes LNS as a great choice of implementation. However, the implementation had been restricted by the addition and subtraction function in LNS arithmetic as these functions entail complex procedures and circuitry. As its huge potential to be a substitution of FP, there is an urgent need for LNS to improve the performance of both operations. Hence, various studies had been conducted in this area, however most of the research concern the implementation of these operations in the negative region. Therefore, this study is conducted with the objective on the exploration of both LNS addition and subtraction operations in the positive region and highlights the potential areas for design modifications and improvements. Then, these enhancements will be combined with other arithmetic functions in creating an optimum LNS design to be utilized in any digital image processing system.
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PublicationBreast surface variation phase map analysis with digital fringe projection( 2019)
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PublicationCharacterization of silica powder prepared from acid leaching and thermal treatment of RHA( 2024)
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PublicationDesign and implementation of bluetooth microcontroller in system-on-chip (SoC)( 2024)
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PublicationDevelopment of copper busbar by silver plating under non-linear load operation using finite element method (FEM)( 2023)
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PublicationDevelopment of green-Naghdi level I equation( 2024)
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PublicationDevelopment of universal OCDMA DW code family equation and structure( 2024)
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PublicationDouble layer controller for distributed software defined network in mitigating cyber attacks( 2024)
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PublicationElectrical energy consumption monitoring system over internet of things( 2024)
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PublicationFirst level interconnection based on optimization of Cu stud bump for chip to chip package( 2018)
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PublicationHardware Design of Combinational 128-bit Camellia Symmetric Cipher using 0.18µm Technology( 2022)
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PublicationHybrid logarithmic number system arithmetic unit: A review( 2013)
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PublicationImplementation of LNS addition and subtraction function with co-transformation in positive and negative region: A comparative analysisThe European Logarithmic Microprocessor (ELM) had been an outstanding breakthrough in logarithmic number system (LNS) research history. The processor successfully reaches the par ability of floating-point (FLP) processor with its rapid and accurate design towards FLP. The design was able to improve the LNS addition and subtraction procedure, which are the drawbacks of any implementation of LNS arithmetic. ELM's subtraction operation had adopted a unique approach, which is the first-order co-transformation to overcome the singularity-to-zero issue of the non-linear function in negative region. Therefore, this research had been introduced to extensively compare and analyze the ELM-based addition and subtraction procedures with the same co-transformation technique implemented in positive region. In achieving this, two aspects are considered, which are the accuracy towards FLP and the memory consumption of both procedures in both regions. Conclusively, the exact ELM-based implementation in positive region of both operations could be realized and achieved comparable accuracy and memory area with a slight modification of the operation procedure. The outcome of this analysis could benefit further investigation of optimizing the LNS design for hardware implementation.