Now showing 1 - 10 of 16
  • Publication
    Design and characterization of a 3.5 GHz CMOS power amplifier for low-band 5G applications
    (Taylor and Francis Ltd., 2025) ; ; ;
    Rohana Sapawi
    A 3.5 GHz CMOS power amplifier (PA) designed for 5G applications is presented in this study, utilizing the 0.18 µm RF CMOS process technology. The circuit architecture comprises two stages: the first stage employs a cascode topology with a negative voltage applied to the transistor body technique to achieve sufficient gain and minimize current, thereby reducing power consumption. In the second stage, to ensure high efficiency, a class-E amplifier is being used. Measurement results indicate a power gain (S21) of 17.2 dB, a power-added efficiency (PAE) of 45.6% and a saturated power (Psat) of 8.5 dBm, obtained at 3.5 GHz. These findings validate the suitability of the proposed design at low-band frequency for 5G applications. The chip area for the proposed design is 2.45 mm². The discrepancy between simulation and measurement is due to the parasitic in the layout design.
  • Publication
    Design of High-Quality Factor Active Indictor Using CMOS 0.18-μm Technology for 5G Applications
    This paper presents high quality factor of active inductor circuit for 5G application. The proposed circuit is based on the differential active inductor (DAI) topology. The DAI is designed using CMOS 0.18 μm technology. The quality factor (Q) can be tuned with the current source values, ranging from 0.5 mA to 3 mA, while the voltage can control the inductance values L. Meanwhile, the frequency range can be controlled with the feedback resistance. The simulation results indicate that the Q factor as large as 262.5k can be achieved with inductor values of 10 nH at frequency 3.2 GHz. In addition, the Q factor of 1650 is obtained at 3.5 GHz. The performance comparison with previously published works is also demonstrated and found that the proposed DAI is suitable for 5G application.
      1  37
  • Publication
    Design of High-Quality Factor Active Indictor Using CMOS 0.18-μm Technology for 5G Applications
    ( 2022-01-01)
    Ali H.A.A.A.
    ;
    ;
    Hasan A.F.
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    ;
    Sapawi R.
    This paper presents high quality factor of active inductor circuit for 5G application. The proposed circuit is based on the differential active inductor (DAI) topology. The DAI is designed using CMOS 0.18 μm technology. The quality factor (Q) can be tuned with the current source values, ranging from 0.5 mA to 3 mA, while the voltage can control the inductance values L. Meanwhile, the frequency range can be controlled with the feedback resistance. The simulation results indicate that the Q factor as large as 262.5k can be achieved with inductor values of 10 nH at frequency 3.2 GHz. In addition, the Q factor of 1650 is obtained at 3.5 GHz. The performance comparison with previously published works is also demonstrated and found that the proposed DAI is suitable for 5G application.
      3  33
  • Publication
    Design of Internet of Things Based Air Pollution Monitoring System Using ThingSpeak and Blynk Application
    This paper presents the design of an IoT based air pollution monitoring system to measure carbon dioxide gas, butane gas, humidity and temperature. The hardware consists of MQ-2 gas sensor, ESP8266 Wi-Fi module, DHT22 temperature and humidity sensors. Meanwhile, the software used in this prototype is the Arduino Integrated Development Environment (IDE) written in function C and C++. The monitoring system indicate air quality is below than 100 AQI for safety air quality and more than 200 AQI for hazardous air quality. The green LED illuminated indicates there is no hazardous gas detected. Meantime, when the butane gas or carbon dioxide gas is identified, the red LED is illuminated. All the data are sent through ThingSpeak and Blynk applications. In ThingSpeak and Blynk applications, the data are displayed and updated after detected by the sensors in every 15 seconds and 1 second. In the Blynk application, when the hazardous gas is detected, the Blynk application sends a notification to alert the users immediately.
      3  31
  • Publication
    A 28 GHz 0.18-μm CMOS cascade power amplifier with reverse body bias technique
    A 28 GHz power amplifier (PA) using CMOS 0.18 μm Silterra process technology is reported. The cascade configuration has been adopted to obtain high Power Added Efficiency (PAE). To achieve low power consumption, the input stage adopts reverse body bias technique. The simulation results show that the proposed PA consumes 32.03mW and power gain (S21) of 9.51 dB is achieved at 28 GHz. The PA achieves saturated power (Psat) of 11.10 dBm and maximum PAE of 16.55% with output 1-dB compression point (OP1dB) 8.44 dBm. These results demonstrate the proposed power amplifier architecture is suitable for 5G applications.
      6  36
  • Publication
    Design and fabrication of a wideband CMOS continuous-time integrated baseband active filter for a synthetic aperture radar receiver
    This thesis presents the design and fabrication of CMOS continuous-time lowpass integrated baseband filters intended for a fully integrated multiband Synthetic Aperture Radar (SAR) receiver. The low-pass filters are part of a bistatic SAR receiver which exhibits less complexity of circuit implementation compared to its monostatic type of antenna counterpart. The bistatic SAR separates the transmit circuits from the receive circuits which is divided into sub-apertures. Since a large number of channels are required, it is very desirable to design integrated receivers in modern ultra deep submicron technologies which can cope with a limited space. In this SAR receiver, the band of operation is bandpass filtered in the radiator panel. However, it is important to have filtering again in the baseband to keep the signal path clean from interfering signals and to limit the noise bandwidth. This continuous-time baseband filter needs to be on-chip and the cutoff frequency must be at 50 MHz up until 160 MHz. This is very challenging in ultra deep submicron Complementary Metal Oxide Semiconductor (CMOS) technologies in which a low supply voltage around 1.2 V is demanded. In addition, the integrated low-pass filter is targeted to have low ±0.75 dB to ±1 dB passband ripple and embedded gain to cater the requirement of the baseband. At the same time, the filter needs to be the most selective since it is located before the Analog to Digital Converter (ADC), to avoid the aliasing noise and unwanted out-of-band signals in the signal sampling. The main objective of this work is to design and fabricate a low-pass continuous-time integrated baseband filter circuit with cutoff frequency of 50 MHz up to 160 MHz as part of a fully integrated SAR receiver.
      4  24
  • Publication
    A 28 GHz high efficiency fully integrated 0.18 µm combined CMOS power amplifier using power divider technique for 5G millimeter-wave applications
    ( 2020-04-01)
    Hasan A.F.
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    ; ;
    Zulkifli T.Z.A.
    A 28 GHz power amplifier (PA) using CMOS 0.18 µm Silterra process technology for milimeter wave applications is reported. Maximizing the power added efficiency (PAE) and output power are achieved by optimize the circuit with power divider and cascade configuration. In addition, reverse body bias is also employed for realizing excellent PAE and power consumption. A three stage CMOS PA with power combiner is designed and simulated. The simulation results show that the proposed PA consumes 62.56 mW and power gain (S21) of 8.08 dB is achieved at 28 GHz. The PA achieves saturated power (Psat) of 12.62 dBm and maximum PAE of 23.74% with output 1-dB compression point (OP1dB) 10.85 dBm. These results demonstrate the proposed power amplifier architecture is suitable for 5G applications.
      1  28
  • Publication
    Dual band low noise amplifier: A review analysis
    ( 2024-02-08)
    Azizan A.
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    ; ;
    Manaf A.A.
    This paper discusses a few earlier efforts in the field of multiband low noise amplifier design (LNA). This study will look at a variety of modern multiband LNA designs, focusing on four topologies: induction matching with notch filter, current reused with cascode, current reused with notch filter, and common source with external capacitor. Each architecture has its own set of benefits and drawbacks. In the future, it will be necessary to strike a balance between tradeoffs, eliminate drawbacks, and achieve optimal multiband LNA performance.
      24  2
  • Publication
    A Contemporary Review of High Voltage Partial Discharge Detection and Recognition Techniques
    ( 2023-07-01)
    Bohari Z.H.
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    ; ; ; ;
    Nasir M.N.M.
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    Sulaima M.F.
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    Ahmad E.Z.
    This review article provides a summary of the most advanced approaches and advancements in the detection and recognition of high voltage partial discharge (PD). It discusses numerous detecting technologies, such as electrical, acoustic, and optical approaches, as well as their merits and disadvantages. It also discusses current developments in signal processing and pattern recognition algorithms used for PD detection and classification. Lastly, the study covers the challenges and limitations in high voltage PD detection and identification studies, as well as potential future solutions.
      3  31
  • Publication
    Merekabentuk pengesan discas permukaan di dalam ''Inclined-Plane Test" dengan menggunakan kaedah optik
    Laporan ini bertujuan untuk memberikan seberapa maklumat tentang ciri-ciri aktiviti discas permukaan secara khustmrya dan aktiviti discas sejara secara umumnya serta peringkat-peringkat proses merekabentuk alat pengesan terhadap aktiviti ini menggunakan kaedah optikal ia meliputi kaji selidik dalam teori-teori tentang kejadian discas permukaan, kriteria-kriterianya dan proses bagaimana ia boleh dikesan oleh sesuatu alat pengesan. Objektif utama projek ini dijalankan adalah untuk merekacipta satu alat pengesan yang menggunakan kaedah optik bagi mengesan dan mengenalpasti kejadian aktiviti discas permukaan pada peralatan elektrik terutamanya pada peralatan voltan tinggi. Adalah diharapkan agar alat pengesan yang dihasil daripada projek ini akan dapat digunakan bagi kegunaan untuk mengesan dan seterusnya mengenalpasti lokasi dimana telah berlakunya aktiviti discas permukaan.
      13  42