This thesis presents the design and fabrication of CMOS continuous-time lowpass integrated baseband filters intended for a fully integrated multiband Synthetic Aperture Radar (SAR) receiver. The low-pass filters are part of a bistatic SAR receiver which exhibits less complexity of circuit implementation compared to its monostatic type of antenna counterpart. The bistatic SAR separates the transmit circuits from the receive circuits which is divided into sub-apertures. Since a large number of channels are required, it is very desirable to design integrated receivers in modern ultra deep submicron technologies which can cope with a limited space. In this SAR receiver, the band of operation is bandpass filtered in the radiator panel. However, it is important to have filtering again in the baseband to keep the signal path clean from interfering signals and to limit the noise bandwidth. This continuous-time baseband filter needs to be on-chip and the cutoff frequency must be at 50 MHz up until 160 MHz. This is very challenging in ultra deep submicron Complementary Metal Oxide Semiconductor (CMOS) technologies in which a low supply voltage around 1.2 V is demanded. In addition, the integrated low-pass filter is targeted to have low ±0.75 dB to ±1 dB passband ripple and embedded gain to cater the requirement of the baseband. At the same time, the filter needs to be the most selective since it is located before the Analog to Digital Converter (ADC), to avoid the aliasing noise and unwanted out-of-band signals in the signal sampling. The main objective of this work is to design and fabricate a low-pass continuous-time integrated baseband filter circuit with cutoff frequency of 50 MHz up to 160 MHz as part of a fully integrated SAR receiver.
