Sohiful Anuar Zainol Murad
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Preferred name
Sohiful Anuar Zainol Murad
Official Name
Sohiful Anuar, Zainol Murad
Alternative Name
Murad, S. A.Zainol
Murad, S. A.Zainol
Anuar, Zainol Murad Sohiful
Zainol Murad, S.A.
Sohiful, Z. M.A.
Main Affiliation
Scopus Author ID
16643180100
Researcher ID
I-1082-2019

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  • Publication
    UWB CMOS low noise amplifier for mode 1
    ( 2017-07-02)
    Tun Zainal Azni Zulkifli
    ;
    Arjuna Marzuki
    ;
    Sohiful Anuar Zainol Murad
    This paper presents an ultra-wideband 3.1-4.9 GHz low noise amplifier (LNA) employing a sixth-order bandpass Chebyshev filter. The LNA has been designed using Silterra 0.18 μm CMOS technology at 1.8 V power supply. The simulation shows that the LNA attains a power gain of 14.1 dB with an input reflection coefficient less than -10 dB in frequency range of interest, a noise figure of 4.29 dB at 3.8 GHz, gain flatness of ±0.25 dB, a 1 dB compression point of -17.67 dBm, -6.90 dBm for IIP3 and power dissipation of 4.5 mW excluding the buffer stage.
  • Publication
    e-PADI: an iot-based paddy productivity monitoring and advisory system
    ( 2019)
    M.A.F. Ismail
    ;
    Mohd Nazrin Md Isa
    ;
    S. N. Mohyar
    ;
    Muhammad Imran Ahmad
    ;
    M. N. M. Ismail
    ;
    Rizalafande Che Ismail
    ;
    A. Harun
    ;
    Sohiful Anuar Zainol Murad
    Rice is source of food calories and protein.  This second most widely grown cereal crop is the staple food for more than half the world’s population especially in developing countries.  The ability of global rice production to meet population demands (now estimated at more than 5 billion and projected to rise to 8.9 billion by 2050) remains in uncertainty in the near future unless challenges in rice production are properly addressed [1-3]. This paper proposed an IoT (Internet of things)-based paddy productivity monitoring and advisory system Using Dash7 Wireless Network Protocol. All collected data will be stored in a database management system to enable users to retrieve data either from tablets, smartphones or computers. The heart of the system is the ATmega328p microcontroller that will control the payload of the wireless network of dash7 and read data from sensor nodes. Results show all data from sensor nodes in representation of graph for analysis purpose.
  • Publication
    Design of High-Quality Factor Active Indictor Using CMOS 0.18-μm Technology for 5G Applications
    ( 2022-01-01)
    Ali H.A.A.A.
    ;
    Sohiful Anuar Zainol Murad
    ;
    Hasan A.F.
    ;
    Faizah Abu Bakar
    ;
    Sapawi R.
    This paper presents high quality factor of active inductor circuit for 5G application. The proposed circuit is based on the differential active inductor (DAI) topology. The DAI is designed using CMOS 0.18 μm technology. The quality factor (Q) can be tuned with the current source values, ranging from 0.5 mA to 3 mA, while the voltage can control the inductance values L. Meanwhile, the frequency range can be controlled with the feedback resistance. The simulation results indicate that the Q factor as large as 262.5k can be achieved with inductor values of 10 nH at frequency 3.2 GHz. In addition, the Q factor of 1650 is obtained at 3.5 GHz. The performance comparison with previously published works is also demonstrated and found that the proposed DAI is suitable for 5G application.
  • Publication
    Bandwidth enhancement technique with low group delay variation CMOS power amplifier for UWB system
    ( 2017-01-01)
    Rohana Sapawi
    ;
    Siti Kudnie Sahari
    ;
    Dayang Nur Salmi Dharmiza Awang Salleh
    ;
    Dayang Azra Awang Mat
    ;
    Sohiful Anuar Zainol Murad
    This paper introduced a bandwidth enhancement technique for ultra-wideband (UWB) transmitter design with low group delay variation for CMOS power amplifier (PA). Three stages of cascade common source topology are implemented to provide high gain with good gain flatness. Shunt peaking inductor is introduced at every stage of the introduced PA to improve the bandwidth and to achieve low group delay variation simultaneously. A resistive shunt feedback method is implemented at the first stage to acquire good input matching. The first and second stages attain gain at lower corner and upper-end frequency respectively, whilst the third stage smoothed the gain flatness curve. In addition, the theoretical analysis of group delay is investigated to determine the important design factor for low group delay variation in 3.1 to 10.6 GHz CMOS PA for UWB transmitters. The outcome of the research shows that a gain about 11.48 ± 0.6 dB at average, S11 less than -10 dB, and S22 less than -14 dB is achieved. Moreover, excellent group delay variation is acquired throughout the entire band, measuring about ±85.8 ps.
  • Publication
    Pseudo-Differential Transconductor Circuit for a Low Supply Voltage Application
    ( 2021-07-26)
    Mohd Sabari N.D.I.B.
    ;
    Abu Bakar F.B.
    ;
    Azizan A.B.
    ;
    Sohiful Anuar Zainol Murad
    This paper presents a pseudo-differential transconductor circuit. Operational Transconductance Amplifier (OTA) is a standout amongst the most functional and major circuit elements within the analog and mixed-signal circuit style. It is additionally one of the more intricate cells to plan. Due to the rising performance of new generation MOS transistors, the complexity of integrated circuit is continuously increasing with time. The reduction in component sizing is one of the main reasons for integrating millions of transistors into a single chip. There is a great demand for battery powered equipment like a laptop, wireless communication, and implantable devices. In all these devices, it is essential to maintain low power dissipation to achieve good battery life and weight. The main feature of the research is to design a pseudodifferential transconductor circuit for a low supply voltage application with the targeted gain greater than 20 dB using Mentor Graphics software. The designs are done in Pyxis Schematic and Pyxis Layout using eldo platform for simulation to simulate the functionality of the transconductor circuit. From the postlayout simulation, with supply voltage of 1.2 V, the gain of 30 dB with cut-off frequency of 398 kHz has been achieved.
  • Publication
    Dual band low noise amplifier: A review analysis
    ( 2024-02-08)
    Azizan A.
    ;
    Sohiful Anuar Zainol Murad
    ;
    Faizah Abu Bakar
    ;
    Manaf A.A.
    This paper discusses a few earlier efforts in the field of multiband low noise amplifier design (LNA). This study will look at a variety of modern multiband LNA designs, focusing on four topologies: induction matching with notch filter, current reused with cascode, current reused with notch filter, and common source with external capacitor. Each architecture has its own set of benefits and drawbacks. In the future, it will be necessary to strike a balance between tradeoffs, eliminate drawbacks, and achieve optimal multiband LNA performance.
  • Publication
    The analysis of low phase nonlinearity 3.1-6 GHz CMOS power amplifier for UWB system
    ( 2017-01-01)
    Sapawi R.
    ;
    Salleh D.
    ;
    Sahari S.
    ;
    Masra S.
    ;
    Mat D.
    ;
    Kipli K.
    ;
    Sohiful Anuar Zainol Murad
    Low phase nonlinearity is important criteria in power amplifier (PA) especially in ultra-wideband system so that the output will remain original identity. Up to date there is no analysis study have been established in achieving low group delay PA in UWB technology, therefore this paper is to examined the factors that affect low phase nonlinearity in 3.1-6.0 GHz PA using two-stage amplifier with shunt resistive feedback technique for UWB system. The proposed PA adopts two stages amplifier together with inter-stage circuit to obtain adequate flatness of the gain. The shunt resistive feedback topology is used to have very wide input matching. The inductive peaking technique and Class A amplifier is adopted to obtain high gain flatness, low phase nonlinearity and linearity simultaneously. The analysis shows that the dominant factor is identified for low phase nonlinearity in UWB PA. The proposed PA achieves the average gain of 10±1 dB, S11<-6dB, S22< -7 dB, and phase nonlinearity of ±195.5 ps. A good linearity and power consumption are obtained. Therefore, these key performance factors of low phase nonlinearity can be applied to facilitate other researchers working in the area of power amplifier circuit design.
  • Publication
    Analysis of FXP adders and multipliers for speed- and area-efficient LNS arithmetic unit
    ( 2014)
    Rizalafande Che Ismail
    ;
    Siti Zarina Md Naziri
    ;
    Sohiful Anuar Zainol Murad
    ;
    J. N. Coleman
    This paper portrays the selection of hardware unit architectures to be implemented in the new LNS based on a 32bit system. The implementations of the LNS multiply and divide only require a FXP adder, while the LNS addition and subtraction function comprised of several memories, FXP adders and multipliers together with other supporting logics. Thus, in choosing the best FXP adders and multipliers, each of the arithmetic is functionally verified and synthesised using Synopsys Design Compiler in Faraday 0.18 μm CMOS technology based on a 32-bit system. Two types of performance measurement, which are the worst-case delay and the silicon area, are chosen as the evaluation arguments. From conducted analytical studies, the CLA/CSLA adder and Booth recoded with Wallace tree multiplier were the best FXP adder and multiplier blocks to be applied in the system since they were the fastest designs. Using these blocks, the synthesis of the LNS system produced an approximately 7.10 ns of critical delay for addition and subtraction, and solely 1.16 ns for multiplication and division. The total area for a complete LNS architecture was 599,871 μm2, in which 65% the size of previously designed LNS architecture of ELM. © 2014 IEEE.
  • Publication
    CMOS power amplifier design techniques for UWB communication: A review
    ( 2017-01-01)
    Sapawi R.
    ;
    Mohamad D.
    ;
    Yusuf D.
    ;
    Sahari S.
    ;
    Salleh D.
    ;
    Hazis N.
    ;
    Sohiful Anuar Zainol Murad
    This paper reviews CMOS power amplifier (PA) design techniques in favour of ultra-wideband (UWB) application. The PA circuit design is amongst the most difficult delegation in developing the UWB transmitter due to conditions that must be achieved, including high gain, good input and output matching, efficiency, linearity, low group delay and low power consumption. In order to meet these requirements, many researchers came up with different techniques. Among the techniques used are distributed amplifiers, resistive shunt feedback, RLC matching, shunt-shunt feedback, inductive source degeneration, current reuse, shunt peaking, and stagger tuning. Therefore, problems and limitation of UWB CMOS PA and circuit topology are reviewed. A number of works on the UWB CMOS PA from the year 2004 to 2016 are reviewed in this paper. In recent developments, UWB CMOS PA are analysed, hence imparting a comparison of performance criteria based on several different topologies.
  • Publication
    Interdigitated electrodes as impedance and capacitance biosensors: A review
    ( 2017-09-26)
    Mazlan N.
    ;
    Muhammad Mahyiddin Ramli
    ;
    Mohd. Mustafa Al Bakri Abdullah
    ;
    Dewi Suriyani Che Halin
    ;
    Isa S.
    ;
    Talip L.
    ;
    Nuaim Siddiqi Danial
    ;
    Sohiful Anuar Zainol Murad
    Interdigitated electrodes (IDEs) are made of two individually addressable interdigitated comb-like electrode structures. IDEs are one of the most favored transducers, widely utilized in technological applications especially in the field of biological and chemical sensors due to their inexpensive, ease of fabrication process and high sensitivity. In order to detect and analyze a biochemical molecule or analyte, the impedance and capacitance signal need to be obtained. This paper investigates the working principle and influencer of the impedance and capacitance biosensors. The impedance biosensor depends on the resistance and capacitance while the capacitance biosensor influenced by the dielectric permittivity. However, the geometry and structures of the interdigitated electrodes affect both impedance and capacitance biosensor. The details have been discussed in this paper.