Shaiful Nizam Mohyar
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Preferred name
Shaiful Nizam Mohyar
Official Name
Shaiful Nizam, Mohyar
Alternative Name
Mohyar, Shaiful Nizami
Mohyar, Saiful Nizam
Mohyar, S. N.
Mohyar, Shaiful Nizam
Mohyar, Shaiful N.
Main Affiliation
Scopus Author ID
55534021900
Researcher ID
FJX-6667-2022

Research Output
Now showing 1 - 7 of 7
  • Publication
    Image data compression using fast Fourier transform (FFT) technique for wireless sensor network
    ( 2024-02-08)
    Haron M.H.
    ;
    Mohd Nazrin Md Isa
    ;
    Muhammad Imran Ahmad
    ;
    Arshad M.A.M.
    ;
    Asral Bahari Jambek
    ;
    Siti Zarina Md Naziri
    ;
    Hussin R.
    ;
    Harun A.
    ;
    Rizalafande Che Ismail
    ;
    Shaiful Nizam Mohyar
    Agricultural settings present unique challenges for the transmission of huge amounts of images over long-range wireless networks. It is challenging to remotely gather data for transmission over a wireless network in research areas due to a lack of basic amenities like internet connections, especially in distant agricultural areas. In this research, the Fast Fourier Transform (FFT) method was used in conjunction with the Discrete Cosine Transform (DCT) method of image compression to achieve a higher compression ratio. In order for a Wireless Sensor Network (WSN) to provide compressed image data to a wireless based station, a LoRaWAN network has been identified. Low-power LoRaWAN networks may regularly transmit compressed images from an agricultural region to a monitoring system up to 15 km away. Images of golden apple snails were collected for this study from a variety of sources. The procedure was coded in MATLAB so that it could be run with input images being judged by the created algorithm. The input images can be compressed with a range of compression ratios (CR) from 3.00 to 50.00, as shown by the simulation results. Compressed image quality is measured not only by the above-mentioned criteria, but also by Mean Square Error (MSE) and Peak Signal to Noise Ratio (PSNR). According to the numbers, the best achievable compression ratio is 49.04, with an MSE of 172.72 and a PSNR of 25.75 at its highest.
  • Publication
    Signal propagation modelling for vehicle-to-infrastructure communication under the influence of metal obstruction
    ( 2021-12)
    Jamie Siregar Cynthia Turner
    ;
    Shahriman Abu Bakar
    ;
    Azizi Harun
    ;
    Mohd Sani Mohamad Hashim
    ;
    Zuradzman Mohamad Razlan
    ;
    D L Ndzi
    ;
    Rizalafande Che Ismail
    ;
    Sohiful Anuar Zainol Murad
    ;
    Mohd Nazrin Md Isa
    ;
    Shaiful Nizam Mohyar
    ;
    Mohammad Fadzli Ramli
    ;
    M K N Zulkifli
    Connected car has become one of emerging technology in the automotive industries today. This development preludes a rise in vehicular communication studies that primarily targets radio channel modelling on vehicle-to-vehicle (V2V) and vehicle-to-infrastructure (V2I) communication mode. Considering vehicular obstruction, vast channel propagation studies have focused more on V2V mode while others consider the typical urban scenarios consisting of high traffic volumes of moving vehicles. Due to challenging propagation mechanisms and high complexity in such areas, radio propagation models applied in simulators assume an obstacle-free environment rather than considering the least effect imposed by metal obstruction on communication signal. Besides, there are limited studies pertaining to metal obstruction that considers several under-explored environments such as actual parking lots, junctions and other road infrastructure support. As such, this paper demonstrates signal attenuation analysis caused by the presence of metal objects in low density over obstacle-free environment on actual parking lot via V2I mode. Two scenarios such as LOS and NLOS conditions consisting of obstacle-free, cars and buses as static metal objects are evaluated. The aim of this research is to characterize signal strength caused by metal blockage on radio wave propagation predicated on the presence of vehicles as a subject of obstruction in comparison to obstacle-free vehicular environment. The validity of data is shown through received signal strength indicator (RSSI) and approximation analysis (RMSE) to demonstrate the efficiency of obtained measurements. The results demonstrated that Log-normal shadowing model yields the best fit to low-density metal obstruction scenario with smallest RMSE of 4.78 under bus obstruction whereas 5.72 under car obstruction.
  • Publication
    Electrical conductivity (EC) sensing system for paddy plant using the internet of things (IoT) connectivity
    ( 2020-01-08)
    Othaman N.N.C.
    ;
    Mohd Nazrin Md Isa
    ;
    Sohiful Anuar Zainol Murad
    ;
    Azizi Harun
    ;
    Shaiful Nizam Mohyar
    This paper presents the design and development of an IoT-based electrical conductivity system for measuring paddy soil nutrients. Relationship between electrical conductivity (EC) and the influence of soil temperature in precision farming will be discussed. In this work, the EC algorithm was modelled and verified using MATLAB and realized on Node MCU (ESP8266) microcontroller. Results showed that the measured data from the developed system is closed to the calibration solution conductivity that is 1.413mS/cm and 12.88mS/cm. It is also noted that the recorded electrical conductivity value increases with temperature.
  • Publication
    Design of CMOS low-dropout voltage regulator for power management integrated circuit in 0.18-μm technology
    ( 2020-01-08)
    Sohiful Anuar Zainol Murad
    ;
    Azizi Harun
    ;
    Mohd Nazrin Md Isa
    ;
    Shaiful Nizam Mohyar
    ;
    Sapawi R.
    ;
    Karim J.
    A low-dropout (LDO) voltage regulator is the main component used in the majority of portable electronic application since it is used as power management unit in those applications. In this paper, a LDO regulator for the power management integrated circuit in 0.18-μm CMOS technology using Cadence software is presented. The error amplifier of the proposed LDO employed seven transistors for current mirror. Meanwhile, the PMOS transistor is used as a pass element transistor to control the voltage variation. The resistors are used as a feedback network circuit while the capacitor is used to minimise the variation of output voltage. The simulation results show that the proposed design provides a 2.41 V constant output voltage for the supply voltage ranges of 2.55 V to 3.55 V. The dropout voltage of 140 mV is achieved with 1.48 mW power consumption. The line regulation is 1.0 mV/V and the load regulation is 0.41 mV/A, while the layout of the proposed regulator is 27 μm × 34 μm.
      1
  • Publication
    Design of 3.1-6.0 GHz CMOS ultra-wideband low noise amplifier with forward body bias technique for wireless applications
    ( 2020-01-08)
    Halim N.F.A.B.
    ;
    Sohiful Anuar Zainol Murad
    ;
    Azizi Harun
    ;
    Mohd Nazrin Md Isa
    ;
    Shaiful Nizam Mohyar
    ;
    Anishaziela Azizan
    This paper presents a design of 3.1-6.0 GHz CMOS ultra-wideband low noise amplifier (UWB LNA) with forward body bias technique for wireless applications. The UWB LNA is designed and simulated using 0.13-μm technology in Cadence software. The proposed UWB LNA consists of two stage common-source (CS) amplifiers with a forward body bias technique. A source degenerated inductor is used at the first stage to achieve a wideband input matching and high linearity. At the second stage, a shunt-peaking inductor is employed to enhance gain at higher frequency. The simulation results indicate that the proposed UWB LNA achieves a power gain (S21) of 10 dB, an input return loss (S11) is less than -5 dB, a minimum noise figure (NF) of 8.5 dB in the frequency range of 3.1- 6.0 GHz with power dissipation of 17.2 mW. The linearity analysis shows a 1 dB compression point (P1dB) of -9 dBm and the third-order intermodulation intercept points (IIP3) of 4 dBm are achieved. The proposed UWB LNA's layout is 0.68 mm2.
      1
  • Publication
    A very low-dropout voltage regulator in 0.18-μm CMOS technology for power management system
    ( 2020-07-01)
    Sohiful Anuar Zainol Murad
    ;
    Azizi Harun
    ;
    Mohd Nazrin Md Isa
    ;
    Shaiful Nizam Mohyar
    ;
    Karim J.
    A low dropout (LDO) voltage regulator is a type of voltage regulator circuit that works well even when the output voltage is very close to the input voltage, improving its power efficiency. This paper proposes the LDO voltage regulator in 0.18-μm CMOS technology. The proposed LDO regulator consists of voltage reference, symmetrical operational transconductance amplifier (OTA), PMOS transistor, resistive feedback network and output capacitor. The NMOS symmetrical OTA is implemented as an error amplifier and a PMOS transistor is employed as a pass device to improve gain and minimize low dropout voltage, respectively. The proposed design is simulated using Spectre simulator in Cadence software to verify its regulator performance. The simulation results show that the proposed LDO is capable to operate from a supply voltage of 1.7-2.0 V with a low dropout voltage of 19.3 mV at a maximum 50 mA load current to regulate output voltage 1.5 V. The active chip is 2.96 mm2 in size. The performance of the proposed LDO is suitable to enhance power management for system on chip (SoC) applications.
      1