Band Gap Amplifier is mostly used in integrated circuit (IC) chips. It is commonly used to generate temperature independent reference voltage. Band Gap Amplifier is essential and implemented widely in analog and digital circuits because it is temperature independent thus produces low voltage. In this work, layout of active reference band gap amplifier is designed in cadence virtuoso and the percentages of differences sizes of layouts are compared. The different versions of layout design are compared in the result to show the percentages of area optimization. The main layout designs such as layout 1 (without sharing source, drain and well), layout 2 (sharing source, drain without sharing wells), and layout 3 (share the source, drain, and well) are designed to get the comparison of area optimization. The results show that there is 27.73% reduction overall layout by applied several techniques to optimize the area in layout design in order to get a compactable layout.
