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Hybrid logarithmic number system arithmetic unit: A review

Journal
2013 IEEE International Conference on Circuits and Systems (ICCAS)
Date Issued
2013
Author(s)
Rizalafande Che Ismail
Universiti Malaysia Perlis
M.K Zakaria
Sohiful Anuar Zainol Murad
Universiti Malaysia Perlis
DOI
10.1109/CircuitsAndSystems.2013.6671617
https://ieeexplore.ieee.org/xpl/conhome/6657100/proceeding
Handle (URI)
https://ieeexplore.ieee.org/document/6671617
https://hdl.handle.net/20.500.14170/9880
Abstract
Logarithmic number system (LNS) arithmetic has the advantages of high performance and high-precision in complex function computation. However, the large hardware problem in LNS addition/subtraction computation has made the large word-length LNS arithmetic implementation impractical. In this paper, the concept of merging the LNS and Floating Point (FLP) operation into a single arithmetic logic unit (ALU) that can execute addition/subtraction and division/multiplication more faster, precise and less complicated has been reviewed. The advantages of using hybrid system were highlighted while comparing and explaining about FLP and LNS.
Subjects
  • Arithmetic logic unit...

  • Floating point

  • Hybrid

  • Logarithmic number sy...

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