Now showing 1 - 5 of 5
  • Publication
    Comparative Analysis of 5-level Multilevel Inverter with Reduced Switched Topology
    A new topology for the single phase 5-level multilevel inverter is proposed in this paper. Using multiple semiconductor switches and lower-level DC voltages as input, a multilevel inverter generates more than two voltage levels to achieve high efficiency, smoother, and less distorted alternating voltage. The conventional 5-level multilevel inverter requires 8 switches in configurations of two cascaded H-bridge resulting in cost addition as well in generating more losses in the circuit. The proposed topology offers the same 5-level output voltage with lesser power switches resulting in cost-effectiveness as well as improve the circuit complexity. The proposed topology is simulated using PowerSim software to testify its functionality, performance, and validation. A comparative of harmonic distortion between the conventional and the proposed topology is reported.
  • Publication
    Multiple switching pattern for a modified reduce switch multilevel inverter: A comparison analysis
    A primary concern of multilevel inverter is its capability to produce desired alternating voltage close to sinusoidal at the output, using multiple sources of DC voltage input. Mostly a multilevel inverter is used to generate the AC voltage from DC voltage. The aim of this paper is to investigate the output of 9 level multilevel inverter by modifying the conventional 5 levels H-bridge cascade multilevel inverter. The proposed design intending to reduce the number of switches from 16 switches to 10 switches. Implementation of different switching pattern methods; equal phase (EP), half equal phase (HEP), half height (HH) and feed forward (FF) and the related expression are presented in this paper. In the result section shows a different percentage of total harmonic distortion achieved. Out of all 4 methods, HH method suppressed distortion wave the most and resulted in the lowest THD in the proposed inverter. This paper shows that by reducing the number of switches in multilevel inverter structure maintains the same quality output as the conventional H-bridge topology. Furthermore, the manipulation of the switches firing angle contribute in decreasing the system THD.
  • Publication
    Selective Harmonic Elimination Pulse Width Modulation for Three-Phase Nine-Level Inverter Using Improved Whale Optimization Algorithm
    ( 2023-10-06)
    Bimazlim M.A.S.
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    ; ; ;
    Talib M.H.N.
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    Muhammad Azhar Walter M.S.
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    For many years, multilevel inverter (MLI) is a system well-known for converting DC voltage to AC voltage which is suitable for energy resources conversion for industrial power sources. With the help of Selective Harmonic Elimination Pulse Width Modulation (SHEPWM) switching technique, the output power from the MLI system is better efficiency with low Total Harmonics Distortion (THD). The SHEPWM switching technique is used to eliminate the lower order of the harmonics and reduces the Total Harmonics Distortion (THD) of the MLI system. Along with the optimization algorithms to solve difficult non-linear equations involving with SHEPWM, applying SHEPWM into MLI system helps to further improve the output power efficiency. Whale Optimization Algorithm (WOA) is one of the algorithms developed which capable of solving the non-linear equation and obtained suitable results for MLI. Additionally, many types of improvement done on WOA, called as Improved Whale Optimization Algorithms (IWOA) also developed to obtain better results compared with WOA. Developed in a MATLAB environment, a proposed IWOA is applied to solve the equation and compared with WOA. The results show that the proposed IWOA capable of achieving higher probability with fast convergence speed reaching global optimal compared to WOA. With the proposed approach, the IWOA efficiently computed required switching angles, to eliminate the selective lower-order harmonics for different modulation indices (Ma). In this paper, the proposed IWOA is performed on a three-phase nine-level cascaded H-bridge multilevel inverter (CHBMLI) for a wide range of modulation indexes between 0.1 until 1. The results show the eliminations of 5th, 7th, and 11th harmonics from the output of the three-phase nine-level MLI system thus reducing THD from the system up to 5.82%.
  • Publication
    Performance analysis of a modified reduce component count multilevel inverter
    Reducing component in circuitry is desirable in many innovations. In multilevel inverter (MLI) perspective, the increasing of switching devices for a higher-level output will significantly increase power losses, thus affected the output harmonic distortion. In this paper, an extended and simplified three-phase reduce component count multilevel inverter (RCCMLI) structure adapted from S. S. Lee, Cascaded Compact-Module Multilevel Inverter (CCM-MLI) is demonstrated and analysed. Symmetrical reduce component structure with H-bridge inverter is considered in this work. For simplification purpose, the current path conduction for reverse current is not demonstrated in this paper. A simulation-based result is presented to observe the performance of RCCMLI with regards to its output voltage harmonic content. Related predetermined parameter values are included in this report. Particularly, this paper verified the aforementioned RCCMLI, but in higher level and three-phase application, which will further improve the pseudo-sinusoidal inverter output as it eliminates the triplens harmonic component compare to single-phase environment. As for the lower order odd harmonics elimination, computational algorithm namely Particle Swarm Optimization (PSO) has been implemented in the RCCMLI control strategy. In comparison to the traditional Cascaded H bridge (CHB), this work finds that employing the switching angle optimization in the proposed RCCMLI produce comparable improvement in minimizing the output voltage harmonic and able to bring the output quality closer to comply with IEEE 519 distortion limit with fewer components and compact size inverter.
  • Publication
    Selective harmonic elimination pulse width modulation for five-phase cascaded multilevel inverter using non-notch and notch switching technique
    As in this era, the conversion of DC power to AC power is a necessity in the power system in order to make useful of renewable energy. The most commonly used switching mechanism is known as inverter or multilevel inverter. However, this switching may cause harmonics. Harmonics usually occur in a power system due to distortion, which can cause a lot of unwanted problems. It could appear either in voltage or in current waveforms. Minimization of Total Harmonic Distortion (THD) is necessary in order to maintain a good power system. This paper introduces selective harmonic elimination pulse width modulation for five-phase cascaded multilevel inverter. The proposed switching technique for five-phase cascaded multilevel inverter used in this research is non-notch and notch switching technique. Particle Swarm Optimization (PSO) algorithm was used as an optimization technique to find switching angles for non-notch and notch switching techniques. In addition, the simulation of a seven-level five-phase cascaded multilevel inverter for both switching operations is carried out in the PSIM environment. The results show that the non-notch switching was able to eliminate lower order harmonics up to the 7th harmonic. In addition, the notch switching technique managed to eliminate lower order harmonics up to the 21st harmonic for 3/3/3 switching distribution.