Publication:
Comparative Analysis of 5-level Multilevel Inverter with Reduced Switched Topology
Comparative Analysis of 5-level Multilevel Inverter with Reduced Switched Topology
Date
2022-01-01
Authors
Arshad M.H.
Baharuddin Ismail
Muhammad Zaid Aihsan
Zainuddin Mat Isa
Siti Khodijah Mazalan
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Research Projects
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Abstract
A new topology for the single phase 5-level multilevel inverter is proposed in this paper. Using multiple semiconductor switches and lower-level DC voltages as input, a multilevel inverter generates more than two voltage levels to achieve high efficiency, smoother, and less distorted alternating voltage. The conventional 5-level multilevel inverter requires 8 switches in configurations of two cascaded H-bridge resulting in cost addition as well in generating more losses in the circuit. The proposed topology offers the same 5-level output voltage with lesser power switches resulting in cost-effectiveness as well as improve the circuit complexity. The proposed topology is simulated using PowerSim software to testify its functionality, performance, and validation. A comparative of harmonic distortion between the conventional and the proposed topology is reported.
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Keywords
5-level inverter | Multilevel inverter | Reduced switch | Single phase