To date, co-transformation architecture is typically used in resolving the singularity issue in the logarithmic number system (LNS). The co-transformation was first introduced by Coleman, by using a rule of sign(r1) ≠ sign(r2) which translate the singularity into an argument that can be stored in two identical look-up tables (LUTs) with size of 2k. Recently, a portable 32-bit chipset preferred a small LUT, hitherto a co-transformation architecture is rearranged. This paper presents a novel double co-transformation, by means of first-order co-transformation architecture that covers-0.5 < r < 0 region is extended to r >-1 to replace the triumvirate F, D and E tables occupy by the interpolator. The accuracy settings at the co-transformation is compromised with the worst case error of 0.5 ulp. The outcome revealed a double co-transformation with Lagrange interpolator shows a decline in the total bit by 13% compared to European Logarithmic Microprocessor (ELM). With a simple architecture, the proposed double co-transformation is a promise for a fast LNS system.
