Publication:
Crypto-Core Design using Camellia Cipher

cris.author.scopus-author-id 57222350867
cris.author.scopus-author-id 26428387900
cris.author.scopus-author-id 22634128600
cris.author.scopus-author-id 22634137400
cris.author.scopus-author-id 56426995200
cris.author.scopus-author-id 56938513200
cris.virtual.department Universiti Malaysia Perlis
cris.virtual.department Universiti Malaysia Perlis
cris.virtual.department Universiti Malaysia Perlis
cris.virtual.department Universiti Malaysia Perlis
cris.virtualsource.department 38d41dbc-f544-4938-ae6f-ff73c5f7d1ac
cris.virtualsource.department c074e684-00ff-44f4-a69a-cc19c7850721
cris.virtualsource.department 5d3e1a9d-d534-4e75-b539-c7efc28cbed4
cris.virtualsource.department 2dab9ecc-7fc7-4448-b0bf-3021c88519e2
dc.contributor.author Wei Ci C.
dc.contributor.author Siti Zarina Md Naziri
dc.contributor.author Rizalafande Che Ismail
dc.contributor.author Razaidi Hussin
dc.contributor.author Mohd Nazrin Md Isa
dc.contributor.author Basir M.S.S.M.
dc.date.accessioned 2024-10-03T00:05:13Z
dc.date.available 2024-10-03T00:05:13Z
dc.date.issued 2021-03-01
dc.description.abstract Camellia cipher is another symmetric block cipher which allows the encryption and decryption process to share the same key. The cipher permits a 128-bits input data with three different key size: 128, 192 and 256 bits. This paper presents two hardware design approach of Camellia cipher, which are FPGA and custom-based design approach. These approaches utilized design softwares of Altera Quartus II with device family of Cyclone II and Synopsys Design Compiler. The performance of Camellia crypto-core design is then been evaluated based on the implementation platform in terms of speed, area and power. With an equal base of 50MHz of clock frequency, custom-based design is found more efficient than FPGA-based design due to the execution time achieved with 8.46ns, which is faster than the latter that consumed double the time with 16.075ns. The custom-based design achieved 15.13 Gbps of throughput. Besides, the power consumption of custom-based design is 1.3519 mW which is lower than the FPGA-based design. In a nutshell, the design has successfully done as it achieved expected encryption and decryption outcomes with acceptable performance.
dc.identifier.doi 10.1088/1742-6596/1755/1/012019
dc.identifier.scopus 2-s2.0-85102412268
dc.identifier.uri https://hdl.handle.net/20.500.14170/8405
dc.relation.grantno undefined
dc.relation.ispartof Journal of Physics: Conference Series
dc.relation.ispartofseries Journal of Physics: Conference Series
dc.relation.issn 17426588
dc.rights open access
dc.title Crypto-Core Design using Camellia Cipher
dc.type Conference Proceeding
dspace.entity.type Publication
oaire.citation.issue 1
oaire.citation.volume 1755
oairecerif.affiliation.orgunit Universiti Malaysia Perlis
oairecerif.affiliation.orgunit Universiti Malaysia Perlis
oairecerif.affiliation.orgunit Universiti Malaysia Perlis
oairecerif.affiliation.orgunit Universiti Malaysia Perlis
oairecerif.affiliation.orgunit Universiti Malaysia Perlis
oairecerif.affiliation.orgunit Politeknik Mukah
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oairecerif.author.affiliation Universiti Malaysia Perlis
oairecerif.author.affiliation Universiti Malaysia Perlis
oairecerif.author.affiliation Universiti Malaysia Perlis
oairecerif.author.affiliation Universiti Malaysia Perlis
oairecerif.author.affiliation #PLACEHOLDER_PARENT_METADATA_VALUE#
oairecerif.citation.number 012019
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person.identifier.scopus-author-id 57222350867
person.identifier.scopus-author-id 26428387900
person.identifier.scopus-author-id 22634128600
person.identifier.scopus-author-id 22634137400
person.identifier.scopus-author-id 56426995200
person.identifier.scopus-author-id 56938513200
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