Lifting Wavelet transform (LWT) has an extensive usage in different image processing applications as image compression and information hiding. LWT is considered a good solution for hardware designs as it relies only on integer calculations while applying the wavelet transform. In this paper, an FPGA design and implementation of LWT is presented, the implementation is achieved using VHDL coding without importing off-shelf components which make the proposed design applicable to a wide range of devices. The design is based on parallel execution to perform LWT implementation with real time response. The design utilized 421 logic registers of DE2 Cyclone II (EP2C35F672C6) FPGA device with 151.91MHz frequency.
