An efficient parallel FPGA-based architecture to Implement AES in image-based IoT applications

Internet of Things (IoT) is a network that enables devices to collect and process information, without human intervention, from remote places. IoT devices deal with a massive amount of transmitted, processed, and stored data. This is accompanied by increased threats to access, steal, damage, or change the information during storage or transmission over unsecured channels. High-security cryptography algorithms like AES require high computational capabilities to achieve information security. But most IoT devices have limited resource. Therefore, it is necessary to use parallel computing architectures that exploit modern technologies in both spatial and temporal parallelisms to obtain the most conceivable computational power. Various methods have been introduced to achieve parallel processing. One of them is field-programmable gate arrays (FPGAs), which have good characteristics suitable for implementing parallel architectures with lower power consumption. This research aims to design and implement an embedded multiple computing processing engine architecture transceivers with effective performance, to obtain better throughput using both spatial and temporal parallelism on FPGA technology to encrypt and decrypt images. In this design, two boards are used, "DE1_Soc and NEEK board" with Altera Quartus prime 18.1, cyclone v 5CSEMA5F31C6 FPGA device for synthesis and simulation. Each engine operates at a 600 MHz maximum frequency in a single engine and 412 MHz in a quad engine. In encryption and decryption processes, each image is divided into equal-sized parts, and a single-engine processes each part concurrently to achieve spatial parallelism. Internally, the engine handles the image's part in temporal parallelism using deep pipelining to execute different tasks concurrently. All data processed in engines is encrypted via the AES algorithm, implemented as a significant part of the engine architecture. The obtained results increased throughput by 210.9 Gbps in the quad engine and 76.8Gbps in the single-engine. This makes this computing architecture efficient and suitable for fast applications such as IoT.