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A study on the impact of silicon-on-nothing (SON) versus silicon-on-insulator (SOI) on the electrostatic performance of a transistor

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cris.virtual.department Universiti Malaysia Perlis
cris.virtual.department Universiti Malaysia Perlis
cris.virtual.department Universiti Malaysia Perlis
cris.virtualsource.department 63d94afe-564d-4cef-b9f2-b37175567d3c
cris.virtualsource.department b4f1e4a1-1844-479b-bc54-8a956aa3f2b0
cris.virtualsource.department 87e5813c-c8ec-4090-a2cd-54f90c223de1
dc.contributor.author Noraini Othman
dc.contributor.author Syarifah Norfaezah Sabki
dc.contributor.author Hasnizah Aris
dc.date.accessioned 2025-06-26T12:09:19Z
dc.date.available 2025-06-26T12:09:19Z
dc.date.issued 2018-12
dc.description.abstract In this work, we investigate the impact of employing silicon-on-nothing (SON) versus silicon-on-insulator (SOI) on the electrostatic performance of a transistor with various ground-plane (GP) structures of Lg = 10 nm through the use of Sentaurus TCAD simulator. The digital figure-of-merit (FoM) of interest includes the results of drain-induced barrier lowering (DIBL) which is a major indicator of a control of short-channel effects (SCEs). It is found that SOI devices produce a lower off-current (Ioff) as compared to SON. In terms of the different GP architectures, the introductions of various GP architectures were found to affect the values of DIBL in SOI whereas the impact on SON is negligible. It can be concluded that GP-B architectures with ground plane underneath the channel areas of SOI is most effective in suppressing substrate depletion effects as evidenced from the lowest DIBL produces.
dc.identifier.uri https://ijneam.unimap.edu.my/
dc.identifier.uri https://ijneam.unimap.edu.my/images/PDF/EGM%20DEC%202018/Vol_11_SI_Dec18_153-158.pdf
dc.identifier.uri https://hdl.handle.net/20.500.14170/13986
dc.language.iso en
dc.publisher Universiti Malaysia Perlis (UniMAP)
dc.relation.ispartof International Journal of Nanoelectronics and Materials (IJNeaM)
dc.relation.issn 1985-5761
dc.subject Silicon-on-nothing
dc.subject Silicon-on-insulator
dc.subject DIBL
dc.subject SCEs
dc.subject Ground-plane
dc.subject CMOS.
dc.title A study on the impact of silicon-on-nothing (SON) versus silicon-on-insulator (SOI) on the electrostatic performance of a transistor
dc.type Resource Types::text::journal::journal article
dspace.entity.type Publication
oaire.citation.endPage 158
oaire.citation.issue Special Issue BOND21 (EGM)
oaire.citation.startPage 153
oaire.citation.volume 11
oairecerif.author.affiliation Universiti Malaysia Perlis
oairecerif.author.affiliation Universiti Malaysia Perlis
oairecerif.author.affiliation Universiti Malaysia Perlis
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