The miniaturization of transistors causes many challenges in producing high quality junctions for a conventional transistor. As conventional transistors getting smaller in size, there are several critical challenges such as low on-state current, Ion and high gate leakage current, Ioff. Junctionless transistor (JLT) is an alternative to conventional transistor with junctions as it is uniformly doped and has no doping concentration gradients. This work embarks to study the impact of various doping concentrations towards the digital and analog figure-of-merit (FoM) of a JLT. Simulations of a junctionless transistor were carried out by using Silvaco ATLAS TCAD Tools for gate length of 25 nm. It is found that the best doping concentration is of 1 × 1018 cm-3 as it produces the highest Ion while maintaining low Ioff of 1.31 × 10-06 A and 6.94 × 10-11 A respectively in the digital realm. In terms of analog FoM, the best doping concentration is also found to be of 1 × 1018 cm-3 as it produces the highest cut-off frequency, ft of 227 GHz.
