In this work, we report on the processing and device characteristics of n++ GaN/AlN/GaN metal oxide semiconductor high electron mobility transistors (MOSHEMTs). The AlN/GaN structure is capped with a highly doped n++ GaN layer which provides more free electrons in the cap layer thus helps in reducing the Ohmic contact resistance. However, this layer in the gate region needs to be removed prior to gate metal deposition to avoid a conducting path between gate metal and the cap layer. A conducting path between the gate metal and GaN cap layer creates gate to source and gate to drain short circuit. A selective etching recipe was developed between n++ GaN and AlN layers. The gas used is a mixture of SF6 and O₂. A 5 nm SiO₂ is used as a gate dielectric and surface passivation to the device. The fabricated device shows a maximum drain current density of 800 mA/mm and a maximum peak transconductance of 135 mS/mm. The breakdown voltage of the device is 73 V. The measured contact resistance for the non-annealed and annealed Ohmic contact is between 5 to 10 Ω.mm and 0.4 to 0.6 Ω.mm, respectively. This indicates that the usage of heavily doped 5 nm n++ GaN cap layer helps in reducing the contact resistance. The results show the potential of the AlN/GaN MOSHEMT structure with a n++ GaN cap layer for future high frequency power application.
