Home
  • English
  • Čeština
  • Deutsch
  • Español
  • Français
  • Gàidhlig
  • Latviešu
  • Magyar
  • Nederlands
  • Português
  • Português do Brasil
  • Suomi
  • Log In
    New user? Click here to register. Have you forgotten your password?
Home
  • Browse Our Collections
  • Publications
  • Researchers
  • Research Data
  • Institutions
  • Statistics
    • English
    • Čeština
    • Deutsch
    • Español
    • Français
    • Gàidhlig
    • Latviešu
    • Magyar
    • Nederlands
    • Português
    • Português do Brasil
    • Suomi
    • Log In
      New user? Click here to register. Have you forgotten your password?
  1. Home
  2. Resources
  3. Journals
  4. International Journal of Nanoelectronics and Materials (IJNeaM)
  5. Designs and simulations of millimetre wave on-chip single turn inductors for 0.13 μm RF CMOS process technology
 
Options

Designs and simulations of millimetre wave on-chip single turn inductors for 0.13 μm RF CMOS process technology

Journal
International Journal of Nanoelectronics and Materials (IJNeaM)
ISSN
1985-5761
Date Issued
2020-01
Author(s)
Hao Wuang Leong
Universiti Tunku Abdul Rahman
Kim Ho Yeap
Universiti Tunku Abdul Rahman
Yee Chyan Tan
Universiti Tunku Abdul Rahman
Handle (URI)
https://ijneam.unimap.edu.my/
https://ijneam.unimap.edu.my/images/PDF/IJNEAM%20JAN%202020%20Vol%2013/Vol_13_No_1_2020_19_189-198.pdf
https://hdl.handle.net/20.500.14170/14582
Abstract
The upcoming Fifth Generation (5G) network has promoted researches in integrated circuit designs and microelectromechanical systems (MEMS). Since the 5G technologies operate mainly in the millimetre wave (mm-wave) band, developing electronic components which are compatible with this frequency range is therefore necessary. This paper presents the design of four novel inductors, applied particularly in Low Noise Amplifiers (LNAs) which operate at 60 GHz to overcome the limitations of the particular Process Design Kit (PDK) in which the provided scalable inductors are characterised at a maximum frequency of 30 GHz. The design is based on Silterra’s 0.13 μm radio frequency complementary metal-oxide-semiconductor (RF CMOS) process technology. The inductors use Ultra-Thick Metal (UTM) with a copper thickness of 3.3 μm. A mixture of analytical and parametric analyses is utilised in designing the four spiral inductors which can be implemented in the PDK used by the aforementioned LNA. The inductances and Q-factors across 1 GHz to 150 GHz were plotted and analysed. The results show that the four designs exhibit very good performance at 60 GHz with minimal tolerances. This paper serves as a proof-of-concept for a methodology on custom inductor design and simulations with existing PDK limitations.
Subjects
  • Inductance

  • Q-Factor

  • RF CMOS

  • Low Noise Amplifiers

  • S-Parameters

File(s)
Designs and Simulations of Millimetre Wave On-chip (929.54 KB)
Views
4
Acquisition Date
Jan 11, 2026
View Details
Downloads
4
Acquisition Date
Jan 11, 2026
View Details
google-scholar
  • About Us
  • Contact Us
  • Policies