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  1. Home
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  3. Faculty of Electronic Engineering & Technology (FKTEN)
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  5. First level interconnection based on optimization of Cu stud bump for chip to chip package
 
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First level interconnection based on optimization of Cu stud bump for chip to chip package

Journal
AIP Conference Proceedings
ISSN
0094-243X
Date Issued
2018
Author(s)
Mary Rose Lim
University of Southern Mindanao
Zaliman Sauli
Universiti Malaysia Perlis
Hanizah Aris
Universiti Malaysia Perlis
Vithyacharan Retnasamy
Universiti Malaysia Perlis
Edward W.C.L.
Kesvakumar Muniandy
Najeeba Khan
C. S. Foong
DOI
10.1063/1.5080908
Handle (URI)
https://hdl.handle.net/20.500.14170/11250
File(s)
research repository notification.pdf (4.4 MB)
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1
Acquisition Date
Jan 8, 2026
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