Publication:
Numerical Simulation and Characterization of Silicon Based OR Logic Gate Operation Using Self-Switching Device
Numerical Simulation and Characterization of Silicon Based OR Logic Gate Operation Using Self-Switching Device
| cris.author.scopus-author-id | 57449716700 | |
| cris.author.scopus-author-id | 57191032557 | |
| cris.author.scopus-author-id | 57222147695 | |
| cris.author.scopus-author-id | 36809748400 | |
| cris.author.scopus-author-id | 55807708700 | |
| cris.author.scopus-author-id | 57202563525 | |
| cris.author.scopus-author-id | 58263407400 | |
| cris.virtual.department | Universiti Malaysia Perlis | |
| cris.virtual.department | Universiti Malaysia Perlis | |
| cris.virtualsource.department | d1d2940a-bd60-47c8-a84e-0b64261e1f27 | |
| cris.virtualsource.department | 1aa53def-3957-48a5-9465-98ca44b7c11f | |
| dc.contributor.author | Goh Y.X. | |
| dc.contributor.author | Zakaria N.F. | |
| dc.contributor.author | Tan Y.L. | |
| dc.contributor.author | Shahrir Rizal Kasjoo | |
| dc.contributor.author | Shaari S. | |
| dc.contributor.author | Muammar Mohamad Isa | |
| dc.contributor.author | Singh A.K. | |
| dc.date.accessioned | 2024-10-03T06:44:39Z | |
| dc.date.available | 2024-10-03T06:44:39Z | |
| dc.date.issued | 2021-01-01 | |
| dc.description.abstract | Logic gates are the main components inside the integrated circuit used for almost every technological application. Nowadays, in order to enhance the performance of the smart device, while targeting in cut down of the fabrication cost and achieve low power consumption, lithography-based VLSI design technology on silicon are still being widely applied. Hence, an OR gate structure, a silicon based self-switching device (SSD) is introduced and investigated in this project. Such device is believed capable to act as an alternative for a low-powered logic gate application, suitable for CMOS devices. The SSD has an advantage in term of simplicity in fabrication process with a very low threshold voltage. Since SSD characteristics is similar to a conventional diode characteristic, the gate is designed in ATLAS Silvaco device simulator based on a diode logic to perform OR logic function after a validation of the physical and materials parameters. The electrical characterization and structural analysis were also done to observe the electrical performance and physical condition in the device. The simulated design showed a good OR logic output response with the inputs, and acceptable output ranged from around 4.5 to 4.8 V with 5 V HIGH inputs. The results from this OR gate characterization may assist in developing the logic gate for device integration and may act as a reference for future complex integrated circuit design. | |
| dc.identifier.scopus | 2-s2.0-85124456444 | |
| dc.identifier.uri | https://hdl.handle.net/20.500.14170/8787 | |
| dc.relation.funding | Ministry of Higher Education, Malaysia | |
| dc.relation.grantno | undefined | |
| dc.relation.ispartof | International Journal of Nanoelectronics and Materials | |
| dc.relation.ispartofseries | International Journal of Nanoelectronics and Materials | |
| dc.relation.issn | 19855761 | |
| dc.subject | ATLAS Silvaco device simulator | OR gate | SSD | |
| dc.title | Numerical Simulation and Characterization of Silicon Based OR Logic Gate Operation Using Self-Switching Device | |
| dc.type | Journal | |
| dspace.entity.type | Publication | |
| oaire.citation.endPage | 93 | |
| oaire.citation.issue | Special Issue InCAPE | |
| oaire.citation.startPage | 87 | |
| oaire.citation.volume | 14 | |
| oairecerif.affiliation.orgunit | Universiti Malaysia Perlis | |
| oairecerif.affiliation.orgunit | Universiti Malaysia Perlis | |
| oairecerif.affiliation.orgunit | Universiti Malaysia Perlis | |
| oairecerif.affiliation.orgunit | Universiti Malaysia Perlis | |
| oairecerif.affiliation.orgunit | Universiti Malaysia Perlis | |
| oairecerif.affiliation.orgunit | Universiti Malaysia Perlis | |
| oairecerif.affiliation.orgunit | Punjab Engineering College (Deemed to be University) | |
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| oairecerif.author.affiliation | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| oairecerif.author.affiliation | Universiti Malaysia Perlis | |
| oairecerif.author.affiliation | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| oairecerif.author.affiliation | Universiti Malaysia Perlis | |
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| person.identifier.orcid | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| person.identifier.orcid | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| person.identifier.orcid | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| person.identifier.orcid | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| person.identifier.scopus-author-id | 57449716700 | |
| person.identifier.scopus-author-id | 57191032557 | |
| person.identifier.scopus-author-id | 57222147695 | |
| person.identifier.scopus-author-id | 36809748400 | |
| person.identifier.scopus-author-id | 55807708700 | |
| person.identifier.scopus-author-id | 57202563525 | |
| person.identifier.scopus-author-id | 58263407400 |
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