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  5. Effect of back gate biasing on silicon nanowire field effect transistor
 
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Effect of back gate biasing on silicon nanowire field effect transistor

Journal
AIP Conference Proceedings
ISSN
0094243X
Date Issued
2021-05-03
Author(s)
Wan Amirah Basyarah Z.A.
Md Nor M.N.
Mohd Khairuddin Md Arshad
Universiti Malaysia Perlis
Mohamad Faris Mohamad Fathil
Universiti Malaysia Perlis
Azlan A.S.
Ibau C.
DOI
10.1063/5.0044281
Abstract
This work presents an experimental analysis of the substrate bias influence on the operation of Silicon Nanowire Field Effect Transistor (SiNW-FET). The device analysis has been performed by using atomic force microscope (AFM) and scanning electron microscope (SEM) to obtain the surface morphological characterization. Then, the electrical characterization was measured over a linear DC sweep, range from -1.5 V to 0.6 V with a step voltage of 0.01V and the variation on the substrate bias applied to the sample from -1V to 0V. As a result, the back gate was found to influence the conductivity of the nanowire with a higher than 0.79 V gate voltage to be applied. The device demonstrated a good behavior of p-type silicon nanowire field effect transistor and capable to operate as a biosensing device.
File(s)
Research repository notification.pdf (4.4 MB)
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