Publication:
A 28 GHz high efficiency fully integrated 0.18 µm combined CMOS power amplifier using power divider technique for 5G millimeter-wave applications

cris.author.scopus-author-id 55975778800
cris.author.scopus-author-id 16643180100
cris.author.scopus-author-id 36809027100
cris.author.scopus-author-id 9332984000
cris.virtual.department Universiti Malaysia Perlis
cris.virtual.department Universiti Malaysia Perlis
cris.virtualsource.department fe956e29-82ee-486c-b764-d30fe182c2a9
cris.virtualsource.department b4548103-e5c5-4e2b-bc80-a1606cc86a5e
dc.contributor.author Hasan A.F.
dc.contributor.author Sohiful Anuar Zainol Murad
dc.contributor.author Faizah Abu Bakar
dc.contributor.author Zulkifli T.Z.A.
dc.date.accessioned 2024-09-26T08:53:04Z
dc.date.available 2024-09-26T08:53:04Z
dc.date.issued 2020-04-01
dc.description.abstract A 28 GHz power amplifier (PA) using CMOS 0.18 µm Silterra process technology for milimeter wave applications is reported. Maximizing the power added efficiency (PAE) and output power are achieved by optimize the circuit with power divider and cascade configuration. In addition, reverse body bias is also employed for realizing excellent PAE and power consumption. A three stage CMOS PA with power combiner is designed and simulated. The simulation results show that the proposed PA consumes 62.56 mW and power gain (S21) of 8.08 dB is achieved at 28 GHz. The PA achieves saturated power (Psat) of 12.62 dBm and maximum PAE of 23.74% with output 1-dB compression point (OP1dB) 10.85 dBm. These results demonstrate the proposed power amplifier architecture is suitable for 5G applications.
dc.identifier.doi 10.11591/eei.v9i2.1854
dc.identifier.scopus 2-s2.0-85083695562
dc.identifier.uri https://hdl.handle.net/20.500.14170/3848
dc.relation.funding Ministry of Higher Education, Malaysia
dc.relation.grantno undefined
dc.relation.ispartof Bulletin of Electrical Engineering and Informatics
dc.relation.ispartofseries Bulletin of Electrical Engineering and Informatics
dc.relation.issn 20893191
dc.rights open access
dc.subject 5G | CMOS power amplifier | Power added efficiency | Power divider | Reverse body bias
dc.title A 28 GHz high efficiency fully integrated 0.18 µm combined CMOS power amplifier using power divider technique for 5G millimeter-wave applications
dc.type Journal
dspace.entity.type Publication
oaire.citation.endPage 651
oaire.citation.issue 2
oaire.citation.startPage 644
oaire.citation.volume 9
oairecerif.affiliation.orgunit Universiti Malaysia Perlis
oairecerif.affiliation.orgunit Universiti Malaysia Perlis
oairecerif.affiliation.orgunit Universiti Malaysia Perlis
oairecerif.affiliation.orgunit Petronas
oairecerif.author.affiliation #PLACEHOLDER_PARENT_METADATA_VALUE#
oairecerif.author.affiliation Universiti Malaysia Perlis
oairecerif.author.affiliation Universiti Malaysia Perlis
oairecerif.author.affiliation #PLACEHOLDER_PARENT_METADATA_VALUE#
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person.identifier.scopus-author-id 55975778800
person.identifier.scopus-author-id 16643180100
person.identifier.scopus-author-id 36809027100
person.identifier.scopus-author-id 9332984000
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