Rizalafande Che Ismail
Thumbnail Image
Preferred name
Rizalafande Che Ismail
Official Name
Rizalafande, Che Ismail
Alternative Name
Ismail, Rizalafande C.
Rizalafande, Che Ismail
Chesmail, R.
Ismail, R. C.
Che Ismail, Rizalafande
Ismail, Rizalafande Che
Ismail, R. Che
Main Affiliation
Scopus Author ID
22634128600

Research Output

Filters

1
65
Reset filters

Settings
Now showing 1 - 10 of 65
Thumbnail Image
Publication

A novel double Co-Transformation for a simple and memory efficient logarithmic number system

2020 , M. S. S. M. Basir , Rizalafande Che Ismail , Mohd Nazrin Md Isa

To date, co-transformation architecture is typically used in resolving the singularity issue in the logarithmic number system (LNS). The co-transformation was first introduced by Coleman, by using a rule of sign(r 1 ) ≠ sign(r 2 ) which translate the singularity into an argument that can be stored in two identical look-up tables (LUTs) with size of 2k. Recently, a portable 32-bit chipset preferred a small LUT, hitherto a co-transformation architecture is rearranged. This paper presents a novel double co-transformation, by means of first-order co-transformation architecture that covers -0.5 <; r <; 0 region is extended to r > -1 to replace the triumvirate F, D and E tables occupy by the interpolator. The accuracy settings at the co-transformation is compromised with the worst case error of 0.5 ulp. The outcome revealed a double co-transformation with Lagrange interpolator shows a decline in the total bit by 13% compared to European Logarithmic Microprocessor (ELM). With a simple architecture, the proposed double co-transformation is a promise for a fast LNS system.

View
Thumbnail Image
Publication

The importance of Extended Reality (XR) technologies in education during the Covid-19 pandemic: Implications and challenges

2023 , Ahmed Jamah Ahmed Alnagrat , Rizalafande Che Ismail , Syed Zulkarnain Syed Idrus

This study gives a review of Extended Reality (XR)-based on education tools, with a focus on the new technology that has seen significant growth in the context of education during the Covid-19 pandemic. Comprehensive research on XR and its applications for the Covid-19 outbreak is conducted using keywords such as education, virtual reality, and Covid-19 pandemic. This includes searching from databases such as Google Scholar, Scopus, Web of Science (WoS), IEEE Xplore, ACM Digital Library, Springer Link, Research Gate, and Academia. The goal of this study was to figure out the significant research efforts in XR technology in the education field during the pandemic. To begin with, we provide an overview of XR followed by describing how this technology contributes to educational experiences. Additionally, we discuss the XR implications and challenges to boost the comprehension of theoretical concepts and technical practice procedures in the education field. Lastly, we consider potential directions for XR technical breakthroughs in present educational experiences linked to the learning domain, as well as preventive measures to prevent the virus from spreading. © 2023 Author(s).

View
Thumbnail Image
Publication

Design and Analysis of 32-Bit Signed and Unsigned Multiplier Using Booth, Vedic and Wallace Architecture

2021-03-01 , Yong K.M. , Razaidi Hussin , Afzan Kamarudin , Rizalafande Che Ismail , Mohd Nazrin Md Isa , Siti Zarina Md Naziri

This paper presents the implementation and performance comparison of the Booth encoding technique and Wallace Tree reduction scheme on Vedic architecture. The radix-4 Booth encoder is widely used to enhance the multiplication speed as it has the capability to reduce the number of partial products generated by half. Vedic multiplier partitions the inputs into two blocks to speed up the partial product generation and Wallace Tree reduction scheme speed up the partial product addition process by eliminating the carry chain of the addition. Radix-4 Booth encoding scheme Vedic multiplier with and without Wallace Tree partial product reduction scheme for signed and unsigned multiplication was designed and synthesized in Synopsys 130 nm technology. For unsigned multiplier, the Booth-Vedic multiplier is 37.29% faster and 26.13% smaller while the Booth-Vedic-Wallace multiplier is 39.79% faster and 28.81% smaller when compared with Vedic multiplier. The performance of both multipliers was dropped when used in signed multiplication due to signed extension during the partial product addition process. All the multiplier is functionally verified using modified testbench that is based on the concept of UVM testbench.

View
Thumbnail Image
Publication

An implementation of Short Time Fourier Transform for Harmonic Signal Detection

2021-03-01 , Basir M.S.S.M. , Rizalafande Che Ismail , Yusof K.H. , Katim N.I.A. , Mohd Nazrin Md Isa , Siti Zarina Md Naziri

Power electronic components has the tendency to induce a non-linear signal called harmonic distortion. Without proper monitoring tools, harmonic distortion can harm sensitive electronic equipment, and in worse case scenarios, may lead to unreliable operation of controller and misalignment of motoring unit. This matter can be compromised by taking safety precaution, by identifying the level of harmonic rise in the electrical system. This paper presents analysis on different characteristics of harmonic signal using frequency distribution technique, namely Fourier transform (FT), and proposal of time-frequency distribution (TFD) technique, which is a short time Fourier transform (STFT). The novelty of utilizing STFT is the analyzed signal is represented in both time and frequency marginals, hence providing extra information of the spectral over the time. Simulation was carried out using MATLAB, by means the results consisting of the magnitude of multi-frequency components signal were represented in time-frequency representation (TFR). From the TFR, parameters such as instantaneous RMS fundamental voltage, V1RMS(t), instantaneous RMS voltage, VRMS(t), instantaneous total waveform distortion, VTWD(t), instantaneous total harmonic distortion, VTHD(t) and instantaneous total nonharmonic distortion, VTnHD(t) had been extracted. The performance of different harmonic signals such as normal, single-level harmonic, multi-level harmonic, short duration harmonic and interharmonic had been analyzed. The performance based on absolute percentage error (APE) index indicated average of 93% of correctness using 256 window length in STFT measurement.

View
Thumbnail Image
Publication

Extended Reality (XR) in virtual laboratories: A review of challenges and future training directions

2021 , Ahmed Jamah Ahmed Alnagrat , Rizalafande Che Ismail , Syed Zulkarnain Syed Idrus

Laboratory laboratories are essential to the education process in all fields of engineering, technology has changed the scientific laboratory landscape. The role of using Extended Reality (XR) technology after the COVID-19 pandemic is unprecedented, the virus had affecting almost all countries concurrently, resulting in an economic crisis, the education sector was the most affected as students could not go to the laboratory to conduct experiments due to the containment of the disease. From this point on, the use of virtual laboratories became a great and effective role for students and the university, as it cost little in the budget compared to the real laboratory. In this paper, the role of virtual laboratories, using extended reality technology, and its impact on education and the future of virtual training in increasing students’ efficiency will be discussed in this paper.

View
Thumbnail Image
Publication

Arithmetic addition and subtraction function of logarithmic number system in positive region: An investigation

2015 , Siti Zarina Md Naziri , Rizalafande Che Ismail , Ali Yeon Md Shakaff

Logarithmic number system or LNS has become an optimal choice in digital image processing instead of floating point (FP) system based on latest researches in LNS. Digital image processing which deals with a lot of complex operations such as multiplication and division, makes LNS as a great choice of implementation. However, the implementation had been restricted by the addition and subtraction function in LNS arithmetic as these functions entail complex procedures and circuitry. As its huge potential to be a substitution of FP, there is an urgent need for LNS to improve the performance of both operations. Hence, various studies had been conducted in this area, however most of the research concern the implementation of these operations in the negative region. Therefore, this study is conducted with the objective on the exploration of both LNS addition and subtraction operations in the positive region and highlights the potential areas for design modifications and improvements. Then, these enhancements will be combined with other arithmetic functions in creating an optimum LNS design to be utilized in any digital image processing system.

View
Thumbnail Image
Publication

Assessing Student Visual Fatigue in Virtual Semiconductor Labs via Head-Mounted Displays: A Computer Vision Syndrome Questionnaire (CVS-Q)

2023-01-01 , Alnagrat A.J.A. , Rizalafande Che Ismail , Akeel A.A.A. , Salem A.A.M.A. , Khalefah S.E.A.S. , Syed Zulkarnain Syed Idrus

This paper evaluates visual fatigue among students in a virtual semiconductor lab using HMDs - the HP Reverb G2 and Oculus Quest 2 - and the CVS-Q questionnaire. The study measures the frequency of visual fatigue symptoms (never, occasionally, or always) and aims to determine the effects of HMD usage on visual fatigue and eye strain, providing insight into the benefits and drawbacks of using HMDs in virtual labs. The study was conducted during the COVID-19 pandemic and aims to determine the effects of HMD usage on visual fatigue and eye strain among students in a virtual semiconductor laboratory learning environment. The results of this evaluation will provide insight into the potential benefits and drawbacks of HMD usage in virtual laboratory environments and inform the development of strategies to mitigate visual fatigue.

View
Thumbnail Image
Publication

A Real-Time distance prediction via deep learning and microsoft kinect

2022 , Hwee Sheng Tham , Razaidi Hussin , Rizalafande Che Ismail

3D(Dimension) understanding has become the herald of computer vision and graphics research in the era of technology. It benefits many applications such as autonomous cars, robotics, and medical image processing. The pros and cons of 3D detection bring convenience to the human community instead of 2D detection. The 3D detection consists of RGB (Red, Green and Blue) colour images and depth images which are able to perform better than 2D in real. The current technology is relying on the high costing light detection and ranging (LiDAR). However, the use of Microsoft Kinect has replaced the LiDAR systems for 3D detection gradually. In this project, a Kinect camera is used to extract the depth of image information. From the depth images, the distance can be defined easily. As in the colour scale, the red colour is the nearest and the blue colour is the farthest. The depth image will turn black when reaching the limitation of the Kinect camera measuring range. The depth information collected will be trained with deep learning architecture to perform a real-time distance prediction.

View
Thumbnail Image
Publication

Design and comparison of 8-bit hybrid and fixed point arithmetic unit

2020-01-08 , Sugumaran P. , Siti Zarina Md Naziri , Rizalafande Che Ismail

An arithmetic unit of the arithmetic logic unit (ALU) plays a significant role in performing arithmetic operations. Most of the recent arithmetic units are implemented based on floating point (FLP) or fixed point (FXP) systems. However, the multiplication and division operation of FLP and FXP systems have some restriction in offering the best performance on speed and area compared to their excellent performance of their addition and subtraction operations. Hence, the hybrid arithmetic unit is an option to offer as it combines the strength of the FXP system for the addition and subtraction operation and logarithmic number system (LNS) for the multiplication and division operation. LNS has the advantage in performing multiplication and division function by substituting these operations into FXP addition and subtraction respectively. Hence, this work presented an 8-bit hybrid arithmetic unit design that performs on four main arithmetic operations: addition, subtraction, multiplication and division. The multiplication and division operations are carried out under LNS by utilizing the Mitchell algorithm, while the addition and subtraction functions are conducted in FXP system. Both hybrid and FXP arithmetic unit are designed with suitable adders, multiplexers and combinational logics. Both arithmetic units are compared in terms of various hardware parameters such as area, cell, timing and power. Both designs are described in Verilog hardware description language (HDL) and functionally simulated and verified using the ModelSim software. The design were then been synthesized using the Synopsys Design Compiler in 0.13 μm TSMC technology. The synthesis results had proven that the designed hybrid arithmetic unit offers better performance compared to FXP arithmetic unit as it produced smaller area, higher speed, less timing and lower power consumption than the FXP arithmetic unit. As a conclusion, the hybrid arithmetic unit is more efficient and profitable than the solely used FXP arithmetic unit.

View
Thumbnail Image
Publication

Image data compression using fast Fourier transform (FFT) technique for wireless sensor network

2024-02-08 , Haron M.H. , Mohd Nazrin Md Isa , Muhammad Imran Ahmad , Arshad M.A.M. , Asral Bahari Jambek , Siti Zarina Md Naziri , Hussin R. , Harun A. , Rizalafande Che Ismail , Shaiful Nizam Mohyar

Agricultural settings present unique challenges for the transmission of huge amounts of images over long-range wireless networks. It is challenging to remotely gather data for transmission over a wireless network in research areas due to a lack of basic amenities like internet connections, especially in distant agricultural areas. In this research, the Fast Fourier Transform (FFT) method was used in conjunction with the Discrete Cosine Transform (DCT) method of image compression to achieve a higher compression ratio. In order for a Wireless Sensor Network (WSN) to provide compressed image data to a wireless based station, a LoRaWAN network has been identified. Low-power LoRaWAN networks may regularly transmit compressed images from an agricultural region to a monitoring system up to 15 km away. Images of golden apple snails were collected for this study from a variety of sources. The procedure was coded in MATLAB so that it could be run with input images being judged by the created algorithm. The input images can be compressed with a range of compression ratios (CR) from 3.00 to 50.00, as shown by the simulation results. Compressed image quality is measured not only by the above-mentioned criteria, but also by Mean Square Error (MSE) and Peak Signal to Noise Ratio (PSNR). According to the numbers, the best achievable compression ratio is 49.04, with an MSE of 172.72 and a PSNR of 25.75 at its highest.

View