Norhawati Ahmad
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Preferred name
Norhawati Ahmad
Official Name
Norhawati, Ahmad
Alternative Name
Ahmad, Norhawati Binti
Ahmad, N.
Ahmad, Norhawati
Main Affiliation
Scopus Author ID
48661864200
Researcher ID
IAW-0777-2023

Research Output

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Now showing 1 - 4 of 4
  • Publication
    Review of mixer design for low voltage - Low power applications
    ( 2017-09-26)
    Nurulain D.
    ;
    Musa F.A.S.
    ;
    Muammar Mohamad Isa
    ;
    Norhawati Ahmad
    ;
    Shahrir Rizal Kasjoo
    A mixer is used in almost all radio frequency (RF) or microwave systems for frequency translation. Nowadays, the increase market demand encouraged the industry to deliver circuit designs to create proficient and convenient equipment with very low power (LP) consumption and low voltage (LV) supply in both digital and analogue circuits. This paper focused on different Complementary Metal Oxide Semiconductor (CMOS) design topologies for LV and LP mixer design. Floating Gate Metal Oxide Semiconductor (FGMOS) is an alternative technology to replace CMOS due to their high ability for LV and LP applications. FGMOS only required a few transistors per gate and can have a shift in threshold voltage (VTH) to increase the LP and LV performances as compared to CMOS, which makes an attractive option to replace CMOS.
  • Publication
    Design and analysis of two stage CMOS operational amplifier using 0.13 μm technology
    ( 2020-01-08)
    Tan K.T.
    ;
    Norhawati Ahmad
    ;
    Muammar Mohamad Isa
    ;
    Musa F.A.S.
    Nowadays, low power operational amplifiers (op-amp) are highly demand for most of the applications such as in medical and communication system. In this project, two stage op-amp is designed and operated at 1.8 V supply voltage. The supply voltage is scaled down to reduce the power dissipation of the op-amp. This is because the power will be high when there is a large supply voltage. The design is simulated and analysed using Mentor Graphic Pyxis software. This two stage op-amp is designed using the Silterra 0.13 μm process technology. The operational amplifier provides a Direct Current (DC) gain of 21.18 dB and a unity gain bandwidth of 6.31 MHz. The gain margin obtained from the op-amp is 14.07 dB and the phase margin of the op-amp is 94.26 ° for 3 pF compensation capacitor and 10 pF load capacitor. The result shows that circuit able to work at 1.8 V power supply voltage and the total power dissipation for the op-amp is 5.35 mW.
      3  26
  • Publication
    Low voltage low power FGMOS based current mirror
    ( 2017-11-22)
    Nurulain D.
    ;
    Musa F.A.S.
    ;
    Muammar Mohamad Isa
    ;
    Norhawati Ahmad
    ;
    Shahrir Rizal Kasjoo
    This paper presents the comparison of a conventional current mirror with the one utilizing floating gate MOSFET transistors (FGMOS) to achieve low power (LP) and low voltage (LV) design. The device structure has been simulated with 0.1μ CMOS technology and 1.2V voltage supply by using SAED 90nm PDK with the Synopsys Custom Designer tool. The FGMOS circuit has shown to have low power consumption of 9.62mW, smaller threshold voltage of 0.2V and Iout of 20 mA. The improvement of 40.1% from conventional current mirror has shown the LV and LP capability of FGMOS transistor.
      35  2
  • Publication
    Design and analysis of folded cascode operational amplifier using 0.13 μm CMOS technology
    ( 2020-01-08)
    Sing Lee Cha
    ;
    Norhawati Ahmad
    ;
    Muammar Mohamad Isa
    ;
    Musa F.A.S.
    In this paper, a folded cascode operational amplifier is designed and analysed by using 0.13 μm CMOS technology. Several analyses such as DC analysis and AC analysis are carried out to analyse the performances of the proposed folded cascode op-amp. Through the simulation of Mentor Graphics, under 3.3 V power supply, the circuit' s DC gain is 32.3590 dB, the phase margin is 83.754 degree with high stability, the bandwidth is larger than 10 MHz, the unity gain bandwidth is as high as 906.8953 MHz and the power dissipation is 86.9774 mW.
      5  26