Home
  • English
  • Čeština
  • Deutsch
  • Español
  • Français
  • Gàidhlig
  • Latviešu
  • Magyar
  • Nederlands
  • Português
  • Português do Brasil
  • Suomi
  • Log In
    New user? Click here to register. Have you forgotten your password?
Home
  • Browse Our Collections
  • Publications
  • Researchers
  • Research Data
  • Institutions
  • Statistics
    • English
    • Čeština
    • Deutsch
    • Español
    • Français
    • Gàidhlig
    • Latviešu
    • Magyar
    • Nederlands
    • Português
    • Português do Brasil
    • Suomi
    • Log In
      New user? Click here to register. Have you forgotten your password?
  1. Home
  2. Resources
  3. UniMAP Index Publications
  4. Publications 2018
  5. 16×16 fast signed multiplier using Booth and Vedic architecture
 
Options

16×16 fast signed multiplier using Booth and Vedic architecture

Journal
AIP Conference Proceedings
ISSN
0094243X
Date Issued
2018-12-06
Author(s)
Shing L.Z.
Hussin R.
Kamarudin A.
Mohyar S.N.
Taking S.
Aziz M.H.A.
Ahmad N.
DOI
10.1063/1.5080898
Abstract
This paper present the new 16×16 signed multiplier design using Booth architecture and Vedic architecture. The Booth architecture is based on Radix-4 Booth multiplier which reduces the number of partial product generated into almost half. Vedic architecture has advantages in partial product generation and addition which are done concurrently [1]. In order to improved the performance of signed muliplier, the 16×16 signed multiplicand and multiplier is partition by using the 16×16 Vedic architecture (8 bits per block). Radix-4 Booth multiplier is used to multiply each block as in 16×16 Vedic architecture. This new 16×16 signed multiplier is taking advantages on Booth multiplier approach on top of Vedic achitecture. It has simple architecture compared to normal 16×16 Radix-4 Booth multiplier. This new signed multiplier uses Ripple Carry Adder (RCA) or Carry Look-Ahead Adder (CLA) to add up the generated partial product. This new 16×16 signed multiplier has improved the performance by reducing the total propagation delay. The new 16×16 signed multiplier design 1 (RCA) and design 2 (CLA) are 33.4% and 35.6% faster compared to the 16×16 Radix-4 Booth multiplier. It is because the partial product generation by Radix-4 Booth multiplier and partial product addition are done concurrently using Vedic architecture.
Funding(s)
Universiti Malaysia Perlis
google-scholar
Views
Downloads
  • About Us
  • Contact Us
  • Policies