The DSOGI-PLL structure is widely used for grid synchronization in three phase systems because of its capability to reject voltage harmonics and rapidly calculate the positive sequence fundamental voltage under unbalanced grid conditions. However, its conventional design requires the estimated supply frequency from the PLL to be fed back to the SOGI structure to make it frequency adaptive. This creates an interdependent loop that reduces stability margins and limits the PLL bandwidth. To reduce this interaction, this paper presents an alternative approach that improves the stability margin of the overall system and so allows the PLL bandwidth to be increased without degrading the SOGI harmonic rejection capability. Detailed simulation and experimental results are presented to validate the proposed approach.
