This paper studies GaN device structure on silicon substrates. The fabricated device, with LG of 4-μm and WG of 100-μm, demonstrates a maximum drain current of 780mA/mm and a threshold voltage of - 4V. The two-dimensional Silvaco simulator tools are used to analyze and model the fabricated device. The simulation results closely match the experimental findings, validating the developed model's accuracy. These outcomes signify that the study can be a reference for modeling other GaN-based devices in future material growth and process development.
