Modelling of thermally grown SiO₂ thickness and on-resistance effects in SiC high power devices

Manufacturing of SiC MOSFETs is challenging, especially given the massive demand for high-power device applications. The selection of the ideal process condition for thermally grown SiO₂ thickness is a time-consuming process which causes a huge burden on the researcher in the fabrication sector. Thus, this study presents a predictive analysis in regression techniques such as linear, polynomial, and power regression to avoid these issues. Mean Absolute Percentage Error (MAPE) and R-squared (R2) techniques validate the regression models. This research explores the gate oxide thickness (Tox) relationship towards the gate voltage for high-power devices applications. Increased gate voltages and Tox both improve the electron mobility in SiC MOSFET, however high interface trap density (Dit) decrease electron mobility. A higher gate voltage overcome the highest electron mobility is achieved at 18 V, Tox = 58.5 nm. During simulation, at lower gate voltages, surface phonons and Coulomb scattering at SiC MOSFET inversion layer restrict the electron mobility. There are various processing conditions for the thermal oxidation process such as conventional (dry, wet), dry nitride (NO, N2O) and wet nitride (HNO3 vapour) which are analyzed in this work. This work clearly demonstrated that SiC-based gate oxide thickness can be extracted using regression techniques during thermal oxidation process at various durations and temperatures for high-power applications. Polynomial regression, instead of linear regression, provides better fitting accuracy when employing duration as the measurement parameter. The outcome of this work shows that oxide growth occurs more rapidly in a wet environment. However, wet oxidation combined with nitrided elements makes a thicker gate oxide more reliability then compared to other processing conditions. This work shows the impacts of drain-tosource on resistance (RDS(on)) for silicon and SiC-based power devices. It offers a relationship between the predictive modelling of the examined parameters such as drain current and zero gate voltage drain current at high temperatures. Thus, according to the abovementioned parameters, SiC MOSFETs operate better than silicon at the same voltage rating of 650 V, concerning to power dissipation, thermal resistance and switching speed. Additionally, it is noticed that RDS(on) is much more affected in 1200 V rating SiC compared to 650 V at high temperature. Hence this reaffirms the need for a reliable gate oxide for power devices in high voltage applications. With this study, it will be possible to determine the oxide thickness of SiC during dry, wet, and nitrided thermal processing conditions without needing to perform expensive experiments, significantly reducing processing time, costs, and material needs. As machine learning technology advances, the findings of this research can be incorporated into semiconductor fabrication tools.