Anishaziela Azizan
Thumbnail Image
Preferred name
Anishaziela Azizan
Official Name
Anishaziela
Alternative Name
Azizan, Anishaziela Bt
Azizan, Anishaziela
Azizan, A.
Main Affiliation
Scopus Author ID
56572985100
Researcher ID
ABA-5069-2021

Research Output

Filters

5
1
5
Reset filters

Settings
Now showing 1 - 5 of 5
Thumbnail Image
Publication

Design of Internet of Things Based Air Pollution Monitoring System Using ThingSpeak and Blynk Application

2021-07-26 , Sohiful Anuar Zainol Murad , Faizah Abu Bakar , Anishaziela Azizan , Shukri M.A.M.

This paper presents the design of an IoT based air pollution monitoring system to measure carbon dioxide gas, butane gas, humidity and temperature. The hardware consists of MQ-2 gas sensor, ESP8266 Wi-Fi module, DHT22 temperature and humidity sensors. Meanwhile, the software used in this prototype is the Arduino Integrated Development Environment (IDE) written in function C and C++. The monitoring system indicate air quality is below than 100 AQI for safety air quality and more than 200 AQI for hazardous air quality. The green LED illuminated indicates there is no hazardous gas detected. Meantime, when the butane gas or carbon dioxide gas is identified, the red LED is illuminated. All the data are sent through ThingSpeak and Blynk applications. In ThingSpeak and Blynk applications, the data are displayed and updated after detected by the sensors in every 15 seconds and 1 second. In the Blynk application, when the hazardous gas is detected, the Blynk application sends a notification to alert the users immediately.

View
Thumbnail Image
Publication

Ultra-low power 0.45 mw 2.4 ghz cmos low noise amplifier for wireless sensor networks using 0.13-μm technology

2020-02-01 , Sohiful Anuar Zainol Murad , Anishaziela Azizan , Hasan A.F.

This paper describes the design topology of a ultra-low power low noise amplifier (LNA) for wireless sensor network (WSN) application. The proposed design of ultra-low power 2.4 GHz CMOS LNA is implemented using 0.13-µm Silterra technology. The LNA benefits of low power from forward body bias technique for first and second stages. Two stages are implemented in order to enhance the gain while obtaining low power consumption for overall circuit. The simulation results show that the total power consumed is only 0.45 mW at low supply voltage of 0.55 V. The power consumption is decreased about 36% as compared with the previous work. A gain of 15.1 dB, noise figure (NF) of 5.9 dB and input third order intercept point (IIP3) of-2 dBm are achieved. The input return loss (S11) and the output return loss (S22) is-17.6 dB and-12.3 dB, respectively. Meanwhile, the calculated figure of merit (FOM) is 7.19 mW-1.

View
Thumbnail Image
Publication

Development of low power 2.4 ghz low noise amplifier using forward body bias technique for wireless sensor network

2016 , Anishaziela Azizan

The modern disposable wireless sensor network (WSN) markets have put great demands on a low-power RF receiver. As to operate using only a single battery for a long period of time continuously, these receivers require a high level of energy efficiency. It is also challenging to achieve require system performance in such low power WSN where the maximum power consumption should be lower than 1 mW in range. Therefore, the objectives of this project are to study, propose, design and verify a new technique for low power low noise amplifier (LNA) as to be implemented for WSN applications. A new topology based on forward body bias technique with cascode configuration has been adopted to make the LNA suitable for low power applications using CMOS 0.13 μm Silterra technology. There are two proposed design in this work which are single stage LNA and two stages LNA. For a single stage LNA, a low supply voltage of 0.5 V is used to optimize the trade-offs between gain, noise figure and power consumption. The post layout simulation results indicate that the power consumption of 0.3 mW is achieved with 600 μA of current consumption which is improved about 62.5 % compared to the previous work. The simulated input return loss (S11) is less than -18 dB while the output return loss (S22) is below -15 dB. Besides, the gain (S21) of 9.86 dB, the noise figure (NF) of 5.11 dB and the third-order intercept point (IIP3) of -7.5 dBm at 2.4 GHz is obtained. The calculated figure of merit (FOM) of 4.62 (1/mW) is the highest among the previously published work. For a two stages LNA, a low supply voltage of 0.55 V is employed and drawn 820 μA of total current. The post layout simulation results depict that the power consumption of 0.45 mW is achieved which is improved about 79 % compared to the previous work. The simulated input return loss (S11) is less than -17 dB while the output return loss (S22) is below -12 dB. Other than that, the gain (S21) of 15.1 dB, the noise figure (NF) of 5.9 dB and the thirdorder intercept point (IIP3) of -2 dBm at 2.4 GHz is attained. The calculated figure of merit (FOM) of 4.37 (1/mW) is the highest among the previously published work. Therefore, the proposed LNA is suitable for WSN application.

View
Thumbnail Image
Publication

Design of 3.1-6.0 GHz CMOS ultra-wideband low noise amplifier with forward body bias technique for wireless applications

2020-01-08 , Halim N.F.A.B. , Sohiful Anuar Zainol Murad , Azizi Harun , Mohd Nazrin Md Isa , Shaiful Nizam Mohyar , Anishaziela Azizan

This paper presents a design of 3.1-6.0 GHz CMOS ultra-wideband low noise amplifier (UWB LNA) with forward body bias technique for wireless applications. The UWB LNA is designed and simulated using 0.13-μm technology in Cadence software. The proposed UWB LNA consists of two stage common-source (CS) amplifiers with a forward body bias technique. A source degenerated inductor is used at the first stage to achieve a wideband input matching and high linearity. At the second stage, a shunt-peaking inductor is employed to enhance gain at higher frequency. The simulation results indicate that the proposed UWB LNA achieves a power gain (S21) of 10 dB, an input return loss (S11) is less than -5 dB, a minimum noise figure (NF) of 8.5 dB in the frequency range of 3.1- 6.0 GHz with power dissipation of 17.2 mW. The linearity analysis shows a 1 dB compression point (P1dB) of -9 dBm and the third-order intermodulation intercept points (IIP3) of 4 dBm are achieved. The proposed UWB LNA's layout is 0.68 mm2.

View
Thumbnail Image
Publication

Ultra-Low Power 0.55 mW 2.4 GHz CMOS Low-Noise Amplifier for Wireless Sensor Network

2022-01-01 , Sohiful Anuar Zainol Murad , Anishaziela Azizan , Sapawi R. , Zulkifli T.Z.A.

This paper describes the design topology of two-stage ultra-low power low noise amplifier (LNA) using the forward body bias technique for wireless sensor network (WSN) application. The proposed design employs CMOS 0.13-µm technology at 2.4 GHz frequency. The LNA consumes low power from the forward body bias technique at the first and the second stages. The threshold voltage of the transistor can be lowered using the forward body bias technique. Two stages are implemented in order to enhance the gain while obtaining low power consumption for overall circuit. The measurement results show that the LNA consumes a total power of 0.55 mW at supply voltage 0.55 V. The input return loss (S11) and the output return loss (S22) is 10 and 12 dB, respectively. A gain of 12 dB, noise figure (NF) of 5.9 dB and input third-order intercept point (IIP3) of −3 dBm are achieved.

View